Phase detection techniques have covered a wide variety of circuit implementations one example of which is a patent to Charles Hogge, Jr., U.S. Pat. No. 4,535,459, assigned to the same assignee as the present invention. Another example is shown as FIG. 1 in the present application of prior art since it is easy to understand. The circuit of FIG. 1 is also shown because the operation of the present invention has a digital operational analogy to the operation of the analog circuit of FIG. 1.
An advantage of the prior art analog circuits is that they did not have to operate at a frequency higher than the signal being phase detected. On the other hand, prior art "digital" phase detection circuits typically used a much higher frequency reference signal than the frequency of the signal being phase detected so as to get adequate resolution in the phase detection of the signal.
The present invention uses a set of signals N which are separated in phase by a uniform amount of 360/N degrees where the frequency of the signals is similar to that of the data being phase detected. The phase of the data signal relative a locally generated reference clock associated with the data signal is ascertained by counting the number of the set of N signals which have a transition from logic 0 to a logic 1 between the start of the data signal and a zero-to-one transition of the associated reference clock. The number of signals of the set performing such a transition is an indication of the relative phase between the two signals. If the set comprises ten signals and a count of five is detected, the relative phase of the data and the reference clock is in a desired state. If the relative phase deviates more than a set amount such as greater than six or less than four counts, an increment or decrement signal is issued to the oscillator producing the reference clock signal to correct the phase in the appropriate direction so that the relative phase between the data signal and the associated reference clock returns to the correct range.
It is thus an object of the present invention to provide an improved phase detector using digital techniques to reduce power consumption and increase the response time. By increasing the response time, I mean the response is much faster primarily due to the fact that analog circuits require filtering and filtering circuits generally have a low bandwidth thus adversely affecting the response time whereas digital circuits do not require any such filtering.